D12320VF25IV Datasheet, PDF (991/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 22 Electrical Characteristics
(5) Timing of On-Chip Supporting Modules
Table 22.9 Timing of On-Chip Supporting Modules
Condition A: V_CC = 2.7 V to 3.6 V, AV_CC = 2.7 V to 3.6 V, V_ref = 2.7 V to AV_CC, V_SS = AV_SS =
0 V, φ = 2 MHz to 20 MHz, T_a = –20°C to 75°C (regular specifications),
T_a = –40°C to 85°C (wide-range specifications)
Condition B: V_CC = 3.0 V to 3.6 V, AV_CC = 3.0 V to 3.6 V, V_ref = 3.0 V to AV_CC, V_SS = AV_SS =
0 V, φ = 2 MHz to 25 MHz, T_a = –20°C to 75°C (regular specifications),
T_a = –40°C to 85°C (wide-range specifications)
Item
I/O ports Output data delay time
Input data setup time
Input data hold time
PPG
Pulse output delay time
TPU
Timer output delay time
Timer input setup time
Timer clock input setup time
Timer clock Single-edge
pulse width specification
Both-edge
specification
8-bit timer Timer output delay time
Timer reset input setup time
Timer clock input setup time
Timer clock Single-edge
pulse width specification
Both-edge
specification
WDT
Overflow output delay time
Condition A
Symbol Min Max
tPWD
—
50
tPRS
30
—
tPRH
30
—
tPOD
—
50
tTOCD
—
50
tTICS
30
—
tTCKS
30
—
tTCKWH
1.5
—
Condition B
Test
Min Max Unit Conditions
—
40
ns Figure 22.20
25
—
25
—
—
40
ns Figure 22.21
—
40
ns Figure 22.22
25
—
25
—
ns Figure 22.23
1.5 —
tcyc
tTCKWL
2.5
—
2.5 —
tTMOD
—
50
tTMRS
30
—
tTMCS
30
—
tTMCWH
1.5
—
—
40
25
—
25
—
1.5 —
ns Figure 22.24
ns Figure 22.26
ns Figure 22.25
tcyc
tTMCWL
2.5
—
2.5 —
tWOVD
—
50
—
40
ns Figure 22.27
Rev.6.00 Sep. 27, 2007 Page 959 of 1268
REJ09B0220-0600