D12320VF25IV Datasheet, PDF (628/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 13 Watchdog Timer
13.5.5 Internal Reset in Watchdog Timer Mode
The chip is not reset internally if TCNT overflows while the RSTE bit is cleared to 0 during
watchdog timer operation, but TCNT and TCSR of the WDT are reset.
TCNT, TCSR, and RSTCR cannot be written to while the WDTOVF signal* is low. Also note that
a read of the WOVF flag is not recognized during this period. To clear the WOVF flag, therefore,
read RSTCSR after the WDTOVF signal* goes high, then write 0 to the WOVF flag.
Note: * The WDTOVF pin function cannot be used in the F-ZTAT versions.
Rev.6.00 Sep. 27, 2007 Page 596 of 1268
REJ09B0220-0600