D12320VF25IV Datasheet, PDF (1099/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
Module
DTC
Register
DTC mode register A
DTC mode register B
DTC source address register
DTC destination address register
DTC transfer count register A
DTC transfer count register B
DTC enable register
Abbreviation R/W
MRA
—^*3
MRB
—^*3
SAR
—^*3
DAR
—^*3
CRA
—^*3
CRB
—^*3
DTCER
R/W
DTC vector register
Module stop control register
DMAC0 Memory address register 0A
I/O address register 0A
Transfer count register 0A
Memory address register 0B
I/O address register 0B
Transfer count register 0B
DMAC1^*7 Memory address register 1A
I/O address register 1A
Transfer count register 1A
Memory address register 1B
I/O address register 1B
Transfer count register 1B
Both
DMA write enable register
DMAC
channels^*7
DMA terminal control register
DMA control register 0A
DMA control register 0B
DMA control register 1A
DMA control register 1B
DMA band control register
Module stop control register
DTVECR R/W
MSTPCR R/W
MAR0A
R/W
IOAR0A
R/W
ETCR0A
R/W
MAR0B
R/W
IOAR0B
R/W
ETCR0B
R/W
MAR1A
R/W
IOAR1A
R/W
ETCR1A
R/W
MAR1B
R/W
IOAR1B
R/W
ETCR1B
R/W
DMAWER R/W
DMATCR R/W
DMACR0A R/W
DMACR0B R/W
DMACR1A R/W
DMACR1B R/W
DMABCR R/W
MSTPCR R/W
Initial Value Address^*1
Undefined —^*4
Undefined —^*4
Undefined —^*4
Undefined —^*4
Undefined —^*4
Undefined —^*4
H'00
H'FF30 to
H'FF35
H'00
H'FF37
H'3FFF
H'FF3C
Undefined H'FEE0
Undefined H'FEE4
Undefined H'FEE6
Undefined H'FEE8
Undefined H'FEEC
Undefined H'FEEE
Undefined H'FEF0
Undefined H'FEF4
Undefined H'FEF6
Undefined H'FEF8
Undefined H'FEFC
Undefined H'FEFE
H'00
H'FF00
H'00
H'FF01
H'00
H'FF02
H'00
H'FF03
H'00
H'FF04
H'00
H'FF05
H'0000
H'FF06
H'3FFF
H'FF3C
Rev.6.00 Sep. 27, 2007 Page 1067 of 1266
REJ09B0220-0600