D12320VF25IV Datasheet, PDF (1251/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix C I/O Port Block Diagrams
Appendix C I/O Port Block Diagrams
C.1 Port 1
Reset
R
Q
D
P1nDDR
C
WDDR1
Reset
R
Q
D
P1nDR
P1_n
C
WDR1
PPG module
Pulse output enable
Pulse output
DMA controller*
DMA transfer
acknowledge enable
DMA transfer
acknowledge
RDR1
TPU module
Output compare output/
PWM output enable
Output compare output/
PWM output
RPOR1
Legend:
WDDR1: Write to P1DDR
WDR1: Write to P1DR
RDR1: Read P1DR
RPOR1: Read port 1
Notes: n = 0 or 1
* The DMAC is not supported in the H8S/2321.
Input capture input
Figure C.1 (a) Port 1 Block Diagram (Pins P1₀ and P1₁)
Rev.6.00 Sep. 27, 2007 Page 1219 of 1268
REJ09B0220-0600