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D12320VF25IV Datasheet, PDF (361/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
Section 8 Data Transfer Controller
Interrupt Source
Origin of
Interrupt
Source
Vector Vector
Number Address DTCE*1
Priority
RXI0 (receive-data-full 0)
TXI0 (transmit-data-empty 0)
SCI
81
channel 0
82
H'04A2
H'04A4
DTCEE3 High
DTCEE2
RXI1 (receive-data-full 1)
TXI1 (transmit-data-empty 1)
SCI
85
channel 1
86
H'04AA
H'04AC
DTCEE1
DTCEE0
RXI2 (receive-data-full 2)
SCI
89
H'04B2 DTCEF7
TXI2 (transmit-data-empty 2)
channel 2
90
H'04B4 DTCEF6 Low
Notes: 1. DTCE bits with no corresponding interrupt are reserved, and should be written with 0.
2. The DMAC is not supported in the H8S/2321.
DTC vector
address
Register information
start address
Register information
Next transfer
Figure 8.4 Correspondence between DTC Vector Address and Register Information
Rev.6.00 Sep. 27, 2007 Page 329 of 1268
REJ09B0220-0600