D12320VF25IV Datasheet, PDF (1187/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
SMR0—Serial Mode Register 0
H'FF78
SCI0
Bit
:
7
6
5
4
3
2
1
0
C/A
CHR
PE
O/E STOP MP CKS1 CKS0
Initial value :
0
0
0
0
0
0
0
0
Read/Write : _R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Clock Select
0 0 φ clock
1 φ/4 clock
1 0 φ/16 clock
1 φ/64 clock
Multiprocessor Mode
0 Multiprocessor function
disabled
1 Multiprocessor format
selected
Stop Bit Length
0 1 stop bit
1 2 stop bits
Parity Mode
0 Even parity
1 Odd parity
Parity Enable
0 Parity bit addition and checking disabled
1 Parity bit addition and checking enabled
Character Length
0 8-bit data
1 7-bit data*
Note: * When 7-bit data is selected, the MSB (bit 7)
of TDR is not transmitted.
Asynchronous Mode/Synchronous Mode Select
0 Asynchronous mode
1 Synchronous mode
Rev.6.00 Sep. 27, 2007 Page 1155 of 1268
REJ09B0220-0600