D12320VF25IV Datasheet, PDF (146/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 5 Interrupt Controller
5.2 Register Descriptions
5.2.1 System Control Register (SYSCR)
Bit
:
7
—
Initial value :
0
R/W
: R/W
6
5
4
3
2
1
0
—
INTM1 INTM0 NMIEG LWROD IRQPAS RAME
0
0
0
0
0
0
1
—
R/W
R/W
R/W
R/W
R/W
R/W
SYSCR is an 8-bit readable/writable register that selects the interrupt control mode, and the
detected edge for NMI.
Only bits 5 to 3 are described here; for details of the other bits, see section 3, MCU Operating
Modes.
SYSCR is initialized to H'01 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 5 and 4—Interrupt Control Mode 1 and 0 (INTM1, INTM0): These bits select one of two
interrupt control modes for the interrupt controller.
Bit 5
INTM1
0
1
Bit 4
INTM0
0
1
0
1
Interrupt
Control Mode
0
—
2
—
Description
Interrupts are controlled by I bit
(Initial value)
Setting prohibited
Interrupts are controlled by bits I2 to I0, and IPR
Setting prohibited
Bit 3—NMI Edge Select (NMIEG): Selects the input edge for the NMI pin.
Bit 3
NMIEG
0
1
Description
Interrupt request generated at falling edge of NMI input
Interrupt request generated at rising edge of NMI input
(Initial value)
Bit 1—IRQ Input Pin Select (IRQPAS): Selects switching of the pins that can be used for input
of IRQ4 to IRQ7. IRQ4 to IRQ7 input is always performed from one of the ports.
Rev.6.00 Sep. 27, 2007 Page 114 of 1268
REJ09B0220-0600