D12320VF25IV Datasheet, PDF (563/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 11 Programmable Pulse Generator (PPG)
Section 11 Programmable Pulse Generator (PPG)
11.1 Overview
The chip has a built-in programmable pulse generator (PPG) that provides pulse outputs by using
the 16-bit timer-pulse unit (TPU) as a time base. The PPG pulse outputs are divided into 4-bit
groups (group 3 to group 0) that can operate both simultaneously and independently.
11.1.1 Features
PPG features are listed below.
• 16-bit output data
⎯ Maximum 16-bit data can be output, and output can be enabled on a bit-by-bit basis
• Four output groups
⎯ Output trigger signals can be selected in 4-bit groups to provide up to four different 4-bit
outputs
• Selectable output trigger signals
⎯ Output trigger signals can be selected for each group from the compare match signals of
four TPU channels
• Non-overlap mode
⎯ A non-overlap margin can be provided between pulse outputs
• Can operate together with the data transfer controller (DTC) and DMA controller (DMAC)*
⎯ The compare match signals selected as output trigger signals can activate the DTC or
DMAC for sequential output of data without CPU intervention
Note: * The DMAC is not supported in the H8S/2321.
• Inverted output can be set
⎯ Inverted data can be output for each group
• Module stop mode can be set
⎯ As the initial setting, PPG operation is halted. Register access is enabled by exiting module
stop mode
Rev.6.00 Sep. 27, 2007 Page 531 of 1268
REJ09B0220-0600