D12320VF25IV Datasheet, PDF (1156/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
DMABCRH — DMA Band Control Register
(Not supported in H8S/2321)
DMABCRL — DMA Band Control Register
(Not supported in H8S/2321)
H'FF06
H'FF07
Full address mode
Bit
:
15
14
13
DMABCRH : FAE1 FAE0
—
Initial value :
0
0
0
Read/Write : R/W
R/W R/W
12
11
10
9
8
—
DTA1
—
DTA0
—
0
0
0
0
0
R/W R/W R/W R/W R/W
DMAC
DMAC
Reserved
Only 0 should be written to this bit
Channel 0 Data Transfer Acknowledge
0 Clearing of selected internal interrupt source
at time of DMA transfer is disabled
1 Clearing of selected internal interrupt source
at time of DMA transfer is enabled
Reserved
Only 0 should be written to this bit
Channel 1 Data Transfer Acknowledge
0 Clearing of selected internal interrupt source
at time of DMA transfer is disabled
1 Clearing of selected internal interrupt source
at time of DMA transfer is enabled
Reserved
Only 0 should be written to these bits
Channel 0 Full Address Enable
0 Short address mode
1 Full address mode
Channel 1 Full Address Enable
0 Short address mode
1 Full address mode
Rev.6.00 Sep. 27, 2007 Page 1124 of 1268
REJ09B0220-0600
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