D12320VF25IV Datasheet, PDF (276/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 7 DMA Controller (Not Supported in the H8S/2321)
7.3.5 DMA Band Control Register (DMABCR)
DMABCRH:
Bit
: 15
14
13
FAE1 FAE0
—
Initial value :
0
0
0
R/W
: R/W
R/W
R/W
12
11
10
9
8
—
DTA1
—
DTA0
—
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
DMABCRL:
Bit
:
:
Initial value :
R/W
:
7
DTME1
0
R/W
6
DTE1
0
R/W
5
DTME0
0
R/W
4
DTE0
0
R/W
3
DTIE1B
0
R/W
2
DTIE1A
0
R/W
1
DTIE0B
0
R/W
0
DTIE0A
0
R/W
DMABCR is a 16-bit readable/writable register that controls the operation of each DMAC
channel.
DMABCR is initialized to H'0000 by a reset, and in hardware standby mode.
Bit 15—Full Address Enable 1 (FAE1): Specifies whether channel 1 is to be used in short
address mode or full address mode.
In full address mode, channels 1A and 1B are used together as a single channel.
Bit 15
FAE1
0
1
Description
Short address mode
Full address mode
(Initial value)
Rev.6.00 Sep. 27, 2007 Page 244 of 1268
REJ09B0220-0600