D12320VF25IV Datasheet, PDF (59/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 1 Overview
Type
Symbol
System control FWE^*1
EMLE^*2
Interrupts
NMI
IRQ7 to
IRQ0
Address bus
A23 to
A0
Data bus
Bus control
D15 to
D0
CS7 to
CS0
AS
RD
HWR
LWR
Pin No.
TFP-120 FP-128B I/O Name and Function
72
80
Input Flash write enable: Enables/
disables flash memory programming.
72
80
Input Emulator enable: For connection to
the power supply (0 V)
74
82
Input Nonmaskable interrupt: Requests a
nonmaskable interrupt. When this pin
is not used, it should be fixed high.
28 to 25,
29 to 32,
89 to 92
32 to 29, Input
33, 34,
37, 38, 97,
98, 101,
102
Interrupt request 7 to 0: These pins
request a maskable interrupt.
28 to 25,
23 to 16,
14 to 7,
5 to 2
32 to 29,
27 to 20,
18 to 11,
9 to 6
Output Address bus: These pins output an
address.
51 to 48, 57 to 54, I/O
46 to 39, 52 to 45,
37 to 34 43 to 40
Data bus: These pins constitute a
bidirectional data bus.
29, 30, 33, 34, Output Chip select: Signals for selecting
61, 60, 69, 66,
areas 7 to 0.
117 to 120 127, 128,
1, 2
82
90
Output Address strobe: When this pin is
low, it indicates that address output
on the address bus is enabled.
83
91
Output Read: When this pin is low, it
indicates that the external address
space can be read.
84
92
Output High write/write enable: A strobe
signal that writes to external space
and indicates that the upper half (D15
to D8) of the data bus is enabled.
The 2-CAS type DRAM write enable
signal.
85
93
Output Low write: A strobe signal that
writes to external space and
indicates that the lower half (D7 to D0)
of the data bus is enabled.
Rev.6.00 Sep. 27, 2007 Page 27 of 1268
REJ09B0220-0600