D12320VF25IV Datasheet, PDF (63/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 1 Overview
Pin No.
Type
Symbol TFP-120 FP-128B I/O Name and Function
I/O ports
P67 to
P60
29 to 32, 33, 34, I/O
63 to 60 37, 38,
71 to 69,
66
Port 6: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port 6 data direction
register (P6DDR).
PA7 to
PA0
PB7 to
PB0
PC7 to
PC0
PD7 to
PD0
28 to 25, 32 to 29, I/O
23 to 20 27 to 24
19 to 16, 23 to 20, I/O
14 to 11 18 to 15
10 to 7, 14 to 11, I/O
5 to 2 9 to 6
51 to 48, 57 to 54, I/O
46 to 43 52 to 49
Port A: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port A data direction
register (PADDR).
Port B^*5: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port B data direction
register (PBDDR).
Port C^*5: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port C data direction
register (PCDDR).
Port D^*5: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port D data direction
register (PDDDR).
PE7 to
PE0
42 to 39, 48 to 45, I/O
37 to 34 43 to 40
Port E: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port E data direction
register (PEDDR).
PF7 to
PF0
80,
88,
I/O
82 to 88 90 to 96
Port F: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port F data direction
register (PFDDR).
PG4 to
PG0
120 to 2, 1,
I/O
116
128 to
126
Port G: A 5-bit I/O port. Input or
output can be designated for each bit
by means of the port G data direction
register (PGDDR).
Notes: 1. Applies to the H8S/2328B F-ZTAT and H8S/2326 F-ZTAT only.
2. Applies to the H8S/2329B F-ZTAT only.
3. Not supported in the H8S/2321.
4. Not available in the F-ZTAT versions.
5. Cannot be used as an I/O port in the ROMless versions.
Rev.6.00 Sep. 27, 2007 Page 31 of 1268
REJ09B0220-0600