D12320VF25IV Datasheet, PDF (303/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 7 DMA Controller (Not Supported in the H8S/2321)
Figure 7.11 illustrates operation in normal mode.
Address TA
Transfer
Address TB
Address BA
Address BB
Legend:
Address TA = LA
Address TB = LB
Address BA = LA + SAIDE · (–1)^SAID · (2^DTSZ · (N–1))
Address BB = LB + DAIDE · (–1)^DAID · (2^DTSZ · (N–1))
Where : LA = Value set in MARA
LB = Value set in MARB
N = Value set in ETCRA
Figure 7.11 Operation in Normal Mode
Transfer requests (activation sources) are external requests and auto-requests.
With auto-request, the DMAC is only activated by register setting, and the specified number of
transfers are performed automatically. With auto-request, cycle steal mode or burst mode can be
selected. In cycle steal mode, the bus is released to another bus master each time a transfer is
performed. In burst mode, the bus is held continuously until transfer ends.
Rev.6.00 Sep. 27, 2007 Page 271 of 1268
REJ09B0220-0600