D12320VF25IV Datasheet, PDF (728/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 15 Smart Card Interface
15.4 Usage Notes
The following points should be noted when using the SCI as a smart card interface.
Receive Data Sampling Timing and Receive Margin in Smart Card Interface Mode: In smart
card interface mode, the SCI operates on a base clock with a frequency of 32, 64, 372, or 256
times the transfer rate (determined by bits BCP1 and BCP0).
In reception, the SCI samples the falling edge of the start bit using the base clock, and performs
internal synchronization. Receive data is latched internally at the rising edge of the 16th, 32nd,
186th, or 128th pulse of the base clock. Use of a 372-times clock is illustrated in figure 15.10.
372 clocks
186 clocks
0
185
371 0
Internal
base
clock
Receive
data (RxD)
Start bit
D0
185
371 0
D1
Synchro-
nization
sampling
timing
Data
sampling
timing
Figure 15.10 Receive Data Sampling Timing in Smart Card Mode
(When Using 372-Times Clock)
Rev.6.00 Sep. 27, 2007 Page 696 of 1268
REJ09B0220-0600