D12320VF25IV Datasheet, PDF (600/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 12 8-Bit Timers
φ
External clock
input pin
Clock input
to TCNT
TCNT
N–1
N
N+1
Figure 12.3 Count Timing for External Clock Input
12.3.2 Compare Match Timing
Setting of Compare Match Flags A and B (CMFA, CMFB): The CMFA and CMFB flags in
TCSR are set to 1 by a compare match signal generated when the TCOR and TCNT values match.
The compare match signal is generated at the last state in which the match is true, just before the
timer counter is updated.
Therefore, when TCOR and TCNT match, the compare match signal is not generated until the
next incrementation clock input. Figure 12.4 shows this timing.
φ
TCNT
N
N+1
TCOR
N
Compare match
signal
CMF
Figure 12.4 Timing of CMF Setting
Rev.6.00 Sep. 27, 2007 Page 568 of 1268
REJ09B0220-0600