D12320VF25IV Datasheet, PDF (429/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 I/O Ports
Port A MOS Pull-Up Control Register (PAPCR)
Bit
:
7
6
5
4
3
2
1
0
PA7PCR PA6PCR PA5PCR PA4PCR PA3PCR PA2PCR PA1PCR PA0PCR
Initial value :
0
0
0
0
0
0
0
0
R/W
: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PAPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port A on an individual bit basis.
All the bits are valid in modes 6 and 7, and bits 7 to 5 are valid in modes 4 and 5. When a PADDR
bit is cleared to 0 (input port setting), setting the corresponding PAPCR bit to 1 turns on the MOS
input pull-up for the corresponding pin.
PAPCR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port A Open Drain Control Register (PAODR)
Bit
:
7
6
5
4
3
2
1
0
PA7ODR PA6ODR PA5ODR PA4ODR PA3ODR PA2ODR PA1ODR PA0ODR
Initial value :
0
0
0
0
0
0
0
0
R/W
: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PAODR is an 8-bit readable/writable register that controls whether PMOS is on or off for each
port A pin (PA₇ to PA₀).
PAODR is valid only in mode 7. Do not set PAODR bits to 1 in modes 4 to 6.
Setting a PAODR bit to 1 makes the corresponding port A pin an NMOS open-drain output, while
clearing the bit to 0 makes the pin a CMOS output.
PAODR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Rev.6.00 Sep. 27, 2007 Page 397 of 1268
REJ09B0220-0600