D12320VF25IV Datasheet, PDF (1153/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
DMACR0A—DMA Control Register 0A
(Not supported in H8S/2321)
DMACR0B—DMA Control Register 0B
(Not supported in H8S/2321)
DMACR1A—DMA Control Register 1A
(Not supported in H8S/2321)
DMACR1B—DMA Control Register 1B
(Not supported in H8S/2321)
H'FF02
H'FF03
H'FF04
H'FF05
DMAC
DMAC
DMAC
DMAC
Full address mode
Bit
: 15
14
13
12
11
10
9
8
DMACRA : DTSZ SAID SAIDE BLKDIR BLKE
—
—
—
Initial value :
0
0
0
0
0
0
0
0
Read/Write : R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Block Direction/Block Enable
Reserved
Only 0 should be written
to these bits
0 0 Transfer in normal mode
1 Transfer in block transfer mode, destination side is block area
1 0 Transfer in normal mode
1 Transfer in block transfer mode, source side is block area
Source Address Increment/Decrement
0 0 MARA is fixed
1 MARA is incremented after a data transfer
1 0 MARA is fixed
1 MARA is decremented after a data transfer
Data Transfer Size
0 Byte-size transfer
1 Word-size transfer
Rev.6.00 Sep. 27, 2007 Page 1121 of 1268
REJ09B0220-0600