D12320VF25IV Datasheet, PDF (286/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 7 DMA Controller (Not Supported in the H8S/2321)
7.4.3
Module Stop Control Register (MSTPCR)
MSTPCRH
MSTPCRL
Bit
: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value : 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R/W
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
MSTPCR is a 16-bit readable/writable register that performs module stop mode control.
When the MSTP15 bit in MSTPCR is set to 1, the DMAC operation stops at the end of the bus
cycle and a transition is made to module stop mode. For details, see section 21.5, Module Stop
Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 15—Module Stop (MSTP15): Specifies the DMAC module stop mode.
Bits 15
MSTP15
0
1
Description
DMAC module stop mode cleared
DMAC module stop mode set
(Initial value)
Rev.6.00 Sep. 27, 2007 Page 254 of 1268
REJ09B0220-0600