D12320VF25IV Datasheet, PDF (1155/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
Short address mode
Bit
:7
DMACR : DTSZ
Initial value : 0
Read/Write : R/W
6
DTID
0
R/W
5
RPE
0
R/W
4
DTDIR
0
R/W
3
DTF3
0
R/W
2
DTF2
0
R/W
1
DTF1
0
R/W
0
DTF0
0
R/W
Data Transfer Direction
0 Dual address mode: Transfer with
MAR as source address and IOAR
as destination address
Single address mode: Transfer with
MAR as source address and DACK
pin as write strobe
1 Dual address mode: Transfer with
IOAR as source address and MAR
as destination address
Single address mode: Transfer with
DACK pin as read strobe and MAR
as destination address
Repeat Enable
0 Transfer in sequential mode
1 Transfer in repeat mode or idle mode
Data Transfer Increment/Decrement
0 MAR is incremented after a data transfer
1 MAR is decremented after a data transfer
Data Transfer Size
0 Byte-size transfer
1 Word-size transfer
Data Transfer Factor
DTF DTF DTF DTF
3 2 10
Channel A
0 0 0 0—
Channel B
1 Activated by A/D converter conversion
end interrupt
1 0—
Activated by DREQ pin
falling edge input
1—
Activated by DREQ pin
low-level input
1 0 0 Activated by SCI channel 0 transmission
data-empty interrupt
1 Activated by SCI channel 0 reception
data-full interrupt
1 0 Activated by SCI channel 1 transmission
data-empty interrupt
1 Activated by SCI channel 1 reception
data-full interrupt
1 0 0 0 _{Activated by TPU channel 0 compare}
match/input capture A interrupt
1 _{Activated by TPU channel 1 compare}
match/input capture A interrupt
1 0 _{Activated by TPU channel 2 compare}
match/input capture A interrupt
1 Activated by TPU channel 3 compare
match/input capture A interrupt
1 0 0 Activated by TPU channel 4 compare
match/input capture A interrupt
1 _{Activated by TPU channel 5 compare}
match/input capture A interrupt
10—
1—
Rev.6.00 Sep. 27, 2007 Page 1123 of 1268
REJ09B0220-0600