D12320VF25IV Datasheet, PDF (730/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 15 Smart Card Interface
Retransfer Operations (Except Block Transfer Mode): Retransfer operations are performed by
the SCI in receive mode and transmit mode as described below.
• Retransfer operation when SCI is in receive mode
Figure 15.11 illustrates the retransfer operation when the SCI is in receive mode.
[1] If an error is found when the received parity bit is checked, the PER bit in SSR is
automatically set to 1. If the RIE bit in SCR is enabled at this time, an ERI interrupt request is
generated. The PER bit in SSR should be kept cleared to 0 until the next parity bit is sampled.
[2] The RDRF bit in SSR is not set for a frame in which an error has occurred.
[3] If no error is found when the received parity bit is checked, the PER bit in SSR is not set.
[4] If no error is found when the received parity bit is checked, the receive operation is judged to
have been completed normally, and the RDRF flag in SSR is automatically set to 1. If the RIE
bit in SCR is enabled at this time, an RXI interrupt request is generated.
If DMAC* or DTC data transfer by an RXI source is enabled, the contents of RDR can be read
automatically. When the RDR data is read by the DMAC* or DTC, the RDRF flag is
automatically cleared to 0.
[5] When a normal frame is received, the pin retains the high-impedance state at the timing for
error signal transmission.
Note: * The DMAC is not supported in the H8S/2321.
nth transfer frame
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
Retransferred frame
Transfer
frame n+1
(DE)
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp Ds D0 D1 D2 D3 D4
RDRF
[2]
[4]
PER
[1]
[3]
Figure 15.11 Retransfer Operation in SCI Receive Mode
Rev.6.00 Sep. 27, 2007 Page 698 of 1268
REJ09B0220-0600