D12320VF25IV Datasheet, PDF (196/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 6 Bus Controller
6.2.8 Refresh Timer Counter (RTCNT)
Bit
:
7
6
5
4
3
2
1
0
Initial value :
0
0
0
0
0
0
0
0
R/W
: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RTCNT is an 8-bit readable/writable up-counter.
RTCNT counts up using the internal clock selected by bits CKS2 to CKS0 in DRAMCR.
When RTCNT matches RTCOR (compare match), the CMF flag in DRAMCR is set to 1 and
RTCNT is cleared to H'00. If the RFSHE bit in DRAMCR is set to 1 at this time, a refresh cycle is
started. Also, if the CMIE bit in DRAMCR is set to 1, a compare match interrupt (CMI) is
generated.
RTCNT is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Note: In the H8S/2321 this register is reserved and must not be accessed.
6.2.9 Refresh Time Constant Register (RTCOR)
Bit
:
7
6
5
4
3
2
1
0
Initial value :
1
1
1
1
1
1
1
1
R/W
: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RTCOR is an 8-bit readable/writable register that sets the period for compare match operations
with RTCNT.
The values of RTCOR and RTCNT are constantly compared, and if they match, the CMF flag in
DRAMCR is set to 1 and RTCNT is cleared to H'00.
RTCOR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Note: In the H8S/2321 this register is reserved and must not be accessed.
Rev.6.00 Sep. 27, 2007 Page 164 of 1268
REJ09B0220-0600