D12320VF25IV Datasheet, PDF (490/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 16-Bit Timer Pulse Unit (TPU)
Bits 7 to 4— I/O Control B3 to B0 (IOB3 to IOB0)
I/O Control D3 to D0 (IOD3 to IOD0):
Bits IOB3 to IOB0 specify the function of TGRB.
Bits IOD3 to IOD0 specify the function of TGRD.
Bit 7 Bit 6 Bit 5 Bit 4
Channel IOB3 IOB2 IOB1 IOB0 Description
0
0000
TGR0B Output disabled
(Initial value)
1
1
0
is output _{Initial output is 0 0 output at compare match}
compare _output
register
1 output at compare match
1
Toggle output at compare
match
100
Output disabled
1
10
Initial output is 1 0 output at compare match
output
1 output at compare match
1
Toggle output at compare
match
1000
1
1*
TGR0B
is input
capture
register
Capture input
source is
TIOCB0 pin
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
1
*
*
Capture input Input capture at TCNT1
source is channel count-up/count-down^*1
1/count clock
*: Don’t care
Note: 1. When bits TPSC2 to TPSC0 in TCR1 are set to B'000 and φ/1 is used as the TCNT1
count clock, this setting is invalid and input capture is not generated.
Rev.6.00 Sep. 27, 2007 Page 458 of 1268
REJ09B0220-0600