D12320VF25IV Datasheet, PDF (240/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 6 Bus Controller
6.8.2 Pin States in Idle Cycle
Table 6.8 shows the pin states in an idle cycle.
Table 6.8 Pin States in Idle Cycle
Pins
Pin State
A23 to A0
D15 to D0
CSn^*2
CAS^*4
AS
Contents of next bus cycle
High impedance
High^*1
High
High
RD
HWR
LWR
DACKm^{*3 *4}
High
High
High
High
Notes: 1. Remains low in DRAM space RAS down mode or a refresh cycle.
2. n = 0 to 7
3. m = 0 and 1
4. The CAS and DACKm pin functions are not supported in the H8S/2321.
Rev.6.00 Sep. 27, 2007 Page 208 of 1268
REJ09B0220-0600