D12320VF25IV Datasheet, PDF (222/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 6 Bus Controller
6.5.9 Byte Access Control
When DRAM with a ×16 configuration is connected, the 2-CAS system can be used for the
control signals required for byte access.
Figure 6.18 shows the control timing in the 2-CAS system, and figure 6.19 shows an example of
2-CAS type DRAM connection.
T_p
T_r
φ
A₂₃ to A₀
Row
CSn (RAS)
CAS
Byte control
LCAS
HWR (WE)
T_c1
T_c2
Column
Note: n = 2 to 5
Figure 6.18 2-CAS System Control Timing (Upper Byte Write Access)
Rev.6.00 Sep. 27, 2007 Page 190 of 1268
REJ09B0220-0600