D12320VF25IV Datasheet, PDF (180/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 6 Bus Controller
6.1.4 Register Configuration
Table 6.2 summarizes the registers of the bus controller.
Table 6.2 Bus Controller Registers
Initial Value
Name
Bus width control register
Abbreviation R/W
ABWCR
R/W
Reset
H'FF/H'00^*2
Access state control register
ASTCR
R/W
H'FF
Wait control register H
WCRH
R/W
H'FF
Wait control register L
WCRL
R/W
H'FF
Bus control register H
BCRH
R/W
H'D0
Bus control register L
BCRL
R/W
H'3C
Memory control register
MCR^*3
R/W
H'00
DRAM control register
DRAMCR^*3
R/W
H'00
Refresh timer counter
RTCNT^*3
R/W
H'00
Refresh time constant register RTCOR^*3
R/W
H'FF
Notes: 1. Lower 16 bits of the address.
2. Determined by the MCU operating mode.
3. In the H8S/2321 this register is reserved and must not be accessed.
Address^*1
H'FED0
H'FED1
H'FED2
H'FED3
H'FED4
H'FED5
H'FED6
H'FED7
H'FED8
H'FED9
Rev.6.00 Sep. 27, 2007 Page 148 of 1268
REJ09B0220-0600