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| D12320VF25IV Datasheet, PDF (223/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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Chip
(Address shift size set to 9 bits)
CS (RAS)
CAS
LCAS
HWR (WE)
A9
A8
A7
A6
A5
A4
A3
A2
A1
D15 to D0
Section 6 Bus Controller
2-CAS type 4-Mbit DRAM
256-kbyte à 16-bit configuration
9-bit column address
RAS
UCAS
LCAS
WE
A8
Row address
A7
input: A8 to A0
A6
Column address
input: A8 to A0
A5
A4
A3
A2
A1
A0
D15 to D0
OE
Figure 6.19 Example of 2-CAS DRAM Connection
Rev.6.00 Sep. 27, 2007 Page 191 of 1268
REJ09B0220-0600
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