D12320VF25IV Datasheet, PDF (942/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 19 ROM
φ
VCC
FWE
MD2 to MD0
RES
t_OSC1
t_MDS
tMDS
Min 0 μs
tMDS^*2
tRESW
SWE bit
SWE
set
SWE
cleared
Mode
Boot Mode User User program mode
change^*1 mode change^*1 mode
User User program
mode mode
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit)^*3
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations prohibited)
Notes: 1. When entering boot mode or making a transition from boot mode to another mode, mode switching must be
carried out by means of RES input. The state of ports with multiplexed address functions and bus control
output pins (AS, RD, WR) will change during this switchover interval (the interval during which the RES pin
input is low), and therefore these pins should not be used as output signals during this time.
2. When making a transition from boot mode to another mode, a mode programming setup time tMDS (min) of 200
ns is necessary with respect to RES clearance timing.
3. See section 22.2.6, Flash Memory Characteristics.
Figure 19.88 Mode Transition Timing
(Example: Boot Mode → User Mode ↔ User Program Mode)
Rev.6.00 Sep. 27, 2007 Page 910 of 1268
REJ09B0220-0600