D12320VF25IV Datasheet, PDF (978/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 22 Electrical Characteristics
Condition A
Condition B
Item
Symbol Min
Max
Min
Max
WR delay time 1
WR delay time 2
WR pulse width 1
WR pulse width 2
Write data delay time
Write data setup time
Write data hold time
WR setup time^*
WR hold time^*
CAS setup time^*
WAIT setup time
WAIT hold time
BREQ setup time
BACK delay time
Bus floating time
BREQO delay time
tWRD1
tWRD2
tWSW1
tWSW2
tWDD
tWDS
tWDH
tWCS
tWCH
tCSR
tWTS
tWTH
tBRQS
tBACD
tBZD
tBRQOD
—
20
—
20
1.0 × —
tcyc – 20
1.5 × —
tcyc – 20
—
30
0.5 × —
tcyc – 20
0.5 × —
tcyc – 10
0.5 × —
tcyc – 10
0.5 × —
tcyc – 10
0.5 × —
tcyc – 10
30
—
5
—
30
—
—
15
—
50
—
30
—
15
—
15
1.0 × —
tcyc – 15
1.5 × —
tcyc – 15
—
20
0.5 × —
tcyc – 15
0.5 × —
tcyc – 8
0.5 × —
tcyc – 10
0.5 × —
tcyc – 10
0.5 × —
tcyc – 8
25
—
5
—
30
—
—
15
—
40
—
25
Note: * The DRAM interface is not supported in the H8S/2321.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions
Figures 22.6 to
22.13
Figure 22.10
Figure 22.8
Figure 22.14
Figure 22.15
Rev.6.00 Sep. 27, 2007 Page 946 of 1268
REJ09B0220-0600