D12320VF25IV Datasheet, PDF (263/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 7 DMA Controller (Not Supported in the H8S/2321)
7.2.5 DMA Band Control Register (DMABCR)
DMABCRH
Bit
:
Initial value :
R/W
:
15
FAE1
0
R/W
14
FAE0
0
R/W
13
SAE1
0
R/W
12
SAE0
0
R/W
11
DTA1B
0
R/W
10
DTA1A
0
R/W
9
DTA0B
0
R/W
8
DTA0A
0
R/W
DMABCRL
Bit
:
Initial value :
R/W
:
7
DTE1B
0
R/W
6
DTE1A
0
R/W
5
DTE0B
0
R/W
4
DTE0A
0
R/W
3
DTIE1B
0
R/W
2
DTIE1A
0
R/W
1
DTIE0B
0
R/W
0
DTIE0A
0
R/W
DMABCR is a 16-bit readable/writable register that controls the operation of each DMAC
channel.
DMABCR is initialized to H'0000 by a reset, and in hardware standby mode.
Bit 15—Full Address Enable 1 (FAE1): Specifies whether channel 1 is to be used in short
address mode or full address mode.
In short address mode, channels 1A and 1B can be used as independent channels.
Bit 15
FAE1
0
1
Description
Short address mode
Full address mode
(Initial value)
Rev.6.00 Sep. 27, 2007 Page 231 of 1268
REJ09B0220-0600