D12320VF25IV Datasheet, PDF (717/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 15 Smart Card Interface
The method of calculating the value to be set in the bit rate register (BRR) from the operating
frequency and bit rate, on the other hand, is shown below. N is an integer, 0 ≤ N ≤ 255, and the
smaller error is specified.
N=
φ
S × 2²ⁿ⁺¹ × B
× 10⁶ – 1
Table 15.6 Examples of BRR Settings for Bit Rate B (bits/s) (When n = 0 and S = 372)
φ (MHz)
7.1424 10.00 10.7136 13.00 14.2848 16.00
18.00
20.00
25.00
Bits/s N Error N Error N Error N Error N Error N Error N Error N Error N Error
9600 0 0.00 1 30 1 25 1 8.99 1 0.00 1 12.01 2 15.99 2 6.60 3 12.49
Table 15.7 Maximum Bit Rate at Various Frequencies (Smart Card Interface Mode)
(When S = 372)
φ (MHz)
Maximum Bit Rate (bits/s)
N
n
7.1424
9600
0
0
10.00
13441
0
0
10.7136
14400
0
0
13.00
17473
0
0
14.2848
19200
0
0
16.00
21505
0
0
18.00
24194
0
0
20.00
26882
0
0
25.00
33602
0
0
The bit rate error is given by the following formula:
φ
Error (%) = ( _{S × 22n+1 × B × (N + 1)}
× 10⁶ – 1) × 100
Rev.6.00 Sep. 27, 2007 Page 685 of 1268
REJ09B0220-0600