D12320VF25IV Datasheet, PDF (158/1304 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 5 Interrupt Controller
Interrupt Source
Origin of
Interrupt
Source
Vector Vector
Number Address^*1 IPR
DTC DMAC^*2
Activa- Activa-
Priority tion tion
DEND0A (channel DMAC
72
H'0120 IPRJ6 to High
—
0/channel 0A transfer
end)^*3
IPRJ4
DEND0B (channel 0B
73
H'0124
—
transfer end) ^*3
DEND1A (channel
74
H'0128
—
1/channel 1A transfer
end) ^*3
DEND1B (channel 1B
75
H'012C
—
transfer end) ^*3
Reserved
—
76
H'0130
—
—
77
H'0134
78
H'0138
79
H'013C
ERI0 (receive error 0) SCI
80
RXI0 (reception data ^{channel 0} 81
full 0)
H'0140
H'0144
IPRJ2 to
IPRJ0
—
—
TXI0 (transmit data
empty 0)
82
H'0148
TEI0 (transmit end 0)
83
H'014C
—
—
ERI1 (receive error 1) SCI
84
RXI1 (reception data ^{channel 1} 85
full 1)
H'0150
H'0154
IPRK6 to
IPRK4
—
—
TXI1 (transmit data
empty 1)
86
H'0158
TEI1 (transmit end 1)
87
H'015C
—
—
ERI2 (receive error 2) SCI
88
RXI2 (reception data ^{channel 2} 89
full 2)
H'0160
H'0164
IPRK2 to
IPRK0
—
—
—
TXI2 (transmit data
90
H'0168
—
empty 2)
TEI2 (transmit end 2)
91
H'016C
Low
—
—
Notes: 1. Lower 16 bits of the start address.
2. The DMAC is not supported in the H8S/2321.
3. Reserved in the H8S/2321.
Rev.6.00 Sep. 27, 2007 Page 126 of 1268
REJ09B0220-0600