EP4SE360F35I4 Datasheet, PDF (78/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

3–22
Chapter 3: TriMatrix Embedded Memory Blocks in Stratix IV Devices
Design Considerations
Figure 3–20 shows a sample functional waveform of mixed-port read-during-write
behavior for don’t care mode in MLABs.
Figure 3–20. MLABs Mixed-Port Read-During-Write: Don’t Care Mode
clk_a
wraddress
rdaddress
data_in
wrena
byteena_a
q_b(registered)
AAAA
A0
A0
BBBB
CCCC DDDD
A1
A1
EEEE
FFFF
11
01
10
11
01
10
AAAA
AABB
CCBB
DDDD
DDEE
FFEE
Figure 3–21 shows a sample functional waveform of mixed-port read-during-write
behavior for old data mode in M9K and M144K blocks.
Figure 3–21. M9K and M144K Blocks Mixed-Port Read-During Write: Old Data Mode
clk_a&b
wrena
address_a
data_a
bytenna
rdenb
address_b
q_b_(asyn)
AAAA
11
A0
BBBB
CCCC
01
10
DDDD
A1
EEEE
FFFF
11
A0
A0 (old data) AAAA
A1
AABB A1(old data) DDDD
EEEE
Stratix IV Device Handbook
Volume 1
December 2011 Altera Corporation