EP4SE360F35I4 Datasheet, PDF (212/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

6–38
Chapter 6: I/O Features in Stratix IV Devices
Termination Schemes for I/O Standards
Example of Using Multiple OCT Calibration Blocks
Figure 6–26 shows a signal timing waveform for two OCT calibration blocks doing R_S
and R_T calibration. Calibration blocks can start calibrating at different times by
asserting the ENASER signals at different times. ENAOCT must remain asserted while any
calibration is ongoing. You must set nCLRUSR low for one OCTUSRCLK cycle before each
ENASER[N] signal is asserted. In Figure 6–26, when you set nCLRUSR to 0 for the second
time to initialize OCT calibration block 0, this does not affect OCT calibration block 1,
whose calibration is already in progress.
Figure 6–26. OCT User-Mode Signal Timing Waveform for Two OCT Blocks
OCTUSRCLK
ENAOCT
nCLRUSR
ENASER0
ENASER1
S2PENA_1A (2)
S2PENA_2A (3)
Calibration Phase
1000 OCTUSRCLK
CY CLE S
1000 OCTUSRCLK
CY CLE S
28 OCTUSRCLK
CY CLE S
28 OCTUSRCLK
CY CLE S
ts2p (1)
ts2p (1)
Notes to Figure 6–26:
(1) ts2p  25 ns.
(2) S2PENA_1A is asserted in Bank 1A for calibration block 0.
(3) S2PENA_2A is asserted in Bank 2A for calibration block 1.
R_S Calibration
If only R_S calibration is used for an OCT calibration block, its corresponding ENASER
signal only requires to be asserted for 240 OCTUSRCLK cycles.
1 You must assert the ENASER signal for 28 OCTUSRCLK cycles for serial transfer.
Termination Schemes for I/O Standards
The following sections describe the different termination schemes for the I/O
standards used in Stratix IV devices.
Single-Ended I/O Standards Termination
Voltage-referenced I/O standards require both an input reference voltage, V_REF, and a
termination voltage, V_TT. The reference voltage of the receiving device tracks the
termination voltage of the transmitting device.
Figure 6–27 and Figure 6–28 show the details of SSTL and HSTL I/O termination on
Stratix IV devices.
Stratix IV Device Handbook
Volume 1
September 2012 Altera Corporation