EP4SE360F35I4 Datasheet, PDF (396/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

10–60
Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Dedicated Remote System Upgrade Circuitry
Figure 10–27 and Table 10–16 specify the contents of the status register. The numbers
in the figure show the bit positions within a 5-bit register.
Figure 10–27. Remote System Upgrade Status Register
4
3
2
1
0
Wd nCONFIG Core_nCONFIG nSTATUS CRC
Table 10–16. Remote System Upgrade Status Register Contents
Status Register Bit
Definition
POR Reset Value
CRC (from the configuration)
CRC error caused reconfiguration
1 bit '0'
nSTATUS
nSTATUS caused reconfiguration
1 bit '0'
CORE_nCONFIG (1)
Device logic array caused reconfiguration
1 bit '0'
nCONFIG
nCONFIG caused reconfiguration
1 bit '0'
Wd
Watchdog timer caused reconfiguration
1 bit '0'
Note to Table 10–16:
(1) Logic array reconfiguration forces the system to load the application configuration data into the Stratix IV device. This occurs after the factory
configuration specifies the appropriate application configuration page address by updating the update register.
Remote System Upgrade State Machine
The remote system upgrade control and update registers have identical bit
definitions, but serve different roles (refer to Table 10–14 on page 10–57). While both
registers can only be updated when the device is loaded with a factory configuration
image, the update register writes are controlled by the user logic; the control register
writes are controlled by the remote system upgrade state machine.
In factory configurations, the user logic sends the AnF bit (set high), the page address,
and the watchdog timer settings for the next application configuration bit to the
update register. When the logic array configuration reset (RU_nCONFIG) goes low, the
remote system upgrade state machine updates the control register with the contents
of the update register and initiates system reconfiguration from the new application
page.
1 To ensure successful reconfiguration between the pages, assert the RU_nCONFIG signal
for a minimum of 250 ns. This is equivalent to strobing the reconfiguration input of
the ALTREMOTE_UPDATE megafunction high for a minimum of 250 ns.
In the event of an error or reconfiguration trigger condition, the remote system
upgrade state machine directs the system to load a factory or application
configuration (page zero or page one, based on the mode and error condition) by
setting the control register accordingly. Table 10–17 lists the contents of the control
register after such an event occurs for all possible error or trigger conditions.
Stratix IV Device Handbook
Volume 1
September 2012 Altera Corporation