EP4SE360F35I4 Datasheet, PDF (422/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

12–4
Chapter 12: JTAG Boundary-Scan Testing in Stratix IV Devices
I/O Voltage Support in a JTAG Chain
I/O Voltage Support in a JTAG Chain
The JTAG chain supports several devices. However, you must use caution if the chain
contains devices that have different V_CCIO levels.
f For more information, refer to the IEEE 1149.1 (JTAG) Boundary-Scan Testing in
Stratix III Devices chapter in volume 1 of the Stratix III Device Handbook.
BST Circuitry
The IEEE Std. 1149.1 BST circuitry is enabled after device power-up. You can perform
BST on Stratix IV devices before, during, and after configuration. Stratix IV devices
support BYPASS, IDCODE, and SAMPLE JTAG instructions during configuration without
interrupting configuration. To send all other JTAG instructions, you must interrupt
configuration using the CONFIG_IO JTAG instruction.
f For more information, refer to AN 39: IEEE Std. 1149.1 (JTAG) Boundary-Scan Testing in
Altera Devices.
f
For more information about using the CONFIG_IO JTAG instruction for dynamic I/O
buffer configuration, considerations when performing BST for configured devices,
and JTAG pin connections to mask-out the BST circuitry, refer to the IEEE 1149.1
(JTAG) Boundary-Scan Testing in Stratix III Devices chapter in volume 1 of the Stratix III
Device Handbook.
f For more information about using the IEEE Std.1149.1 circuitry for device
configuration, refer to the Configuration, Design Security, Remote System Upgrades in
Stratix IV Devices chapter.
f
If you must perform BST for configured devices, you must use the Quartus II software
version 8.1 and onwards to generate the design-specific boundary-scan description
language (BSDL) files. For the procedure to generate post-configured BSDL files using
the Quartus II software, refer to the BSDL Files Generation in Quartus II on the Altera
website.
BSDL Support
BSDL, a subset of VHDL, provides a syntax that allows you to describe the features of
an IEEE Std. 1149.1 BST-capable device that can be tested.
f For more information about BSDL files for IEEE Std. 1149.1-compliant Stratix IV
devices, refer to the Stratix IV BSDL Files on the Altera website.
f
BSDL files for IEEE std. 1149.1-compliant Stratix IV devices can also be generated
using the Quartus II software version 8.1 and onwards. For more information about
the procedure to generate BSDL files using the Quartus II software, refer to the BSDL
Files Generation in Quartus II on the Altera website.
Stratix IV Device Handbook
Volume 1
February 2011 Altera Corporation