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EP4SE360F35I4 Datasheet, PDF (324/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced
8–44
Chapter 8: High-Speed Differential I/O Interfaces and DPA in Stratix IV Devices
Differential Pin Placement Guidelines
Figure 8–35. Invalid Placement of DPA-Disabled Differential I/Os Due to Interleaving of Channels
Driven by the Corner and Center Left and Right PLLs
Corner Left/Right
PLL
Reference CLK
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
Reference CLK
Center Left/Right
PLL
Stratix IV Device Handbook
Volume 1
September 2012 Altera Corporation