EP4SE360F35I4 Datasheet, PDF (421/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

Chapter 12: JTAG Boundary-Scan Testing in Stratix IV Devices
BST Operation Control
12–3
Table 12–2. IDCODE Information for Stratix IV Devices (Part 2 of 2)
Device
Version (4 Bits)
IDCODE (32 Bits) ⁽¹⁾
Part Number (16 Bits)
Manufacturer Identity
(11 Bits)
EP4SE530
EP4SE820
EP4S40G2 ⁽⁵⁾
EP4S40G5 ⁽⁶⁾
EP4S100G2 ⁽⁵⁾
EP4S100G3
EP4S100G4
EP4S100G5 ⁽⁶⁾
0000
0000
0000
0000
0000
0000
0000
0000
0010 0100 0001 0011
0010 0100 0000 0100
0010 0100 0100 0001
0010 0100 0010 0011
0010 0100 0100 0001
0010 0100 1010 0011
0010 0100 0110 0011
0010 0100 0010 0011
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
Notes to Table 12–2:
(1) The MSB is on the left.
(2) The LSB of the IDCODE is always 1.
(3) The IDCODE is applicable for all packages except F1932.
(4) The IDCODE is applicable for package F1932 only.
(5) For the ES1 device, the IDCODE is the same as the IDCODE of EP4SGX230.
(6) For the ES1 device, the IDCODE is the same as the IDCODE of EP4SGX530.
LSB
(1 Bit) ⁽²⁾
1
1
1
1
1
1
1
1
1 If the device is in reset state, when the nCONFIG or nSTATUS signal is low, the device
IDCODE might not be read correctly. To read the device IDCODE correctly, you must
issue the IDCODE JTAG instruction only when the nSTATUS signal is high.
f For more information about the following topics, refer to the IEEE 1149.1 (JTAG)
Boundary-Scan Testing in Stratix III Devices chapter in volume 1 of the Stratix III Device
Handbook:
■ JTAG instruction codes with descriptions
■ TAP controller state-machine
■ Timing requirements for IEEE Std. 1149.1 signals
■ Instruction mode
■ Mandatory JTAG instructions (SAMPLE/PRELOAD, EXTEST, and BYPASS)
■ Optional JTAG instructions (IDCODE, USERCODE, CLAMP, and HIGHZ)
February 2011 Altera Corporation
Stratix IV Device Handbook
Volume 1