EP4SE360F35I4 Datasheet, PDF (367/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Passive Serial Configuration
10–31
PS Configuration Timing
Figure 10–13 shows the timing waveform for PS configuration when using a MAX II
device as an external host.
Figure 10–13. PS Configuration Timing Waveform (Note 1)
nCONFIG
t_CF2ST1
t_CFG
t_CF2CK
nSTATUS (2)
CONF_DONE (3)
DCLK
DATA
User I/O
t_STATUS
t_CF2ST0
t_CLK
t_CF2CD
t_CH t_CL
t_ST2CK
t_DH
Bit 0 Bit 1
t_DSU
Bit 2
Bit 3
High-Z
Bit n
(4)
(5)
User Mode
INIT_DONE
t_CD2UM
Notes to Figure 10–13:
(1) The beginning of this waveform shows the device in user mode. In user mode, nCONFIG, nSTATUS, and CONF_DONE are at logic high levels.
When nCONFIG is pulled low, a reconfiguration cycle begins.
(2) After power-up, the Stratix IV device holds nSTATUS low for the time of the POR delay.
(3) After power-up, before and during configuration, CONF_DONE is low.
(4) Do not leave DCLK floating after configuration. You can drive it high or low, whichever is more convenient.
(5) DATA[0] is available as a user I/O pin after configuration. The state of this pin depends on the dual-purpose pin settings.
Table 10–7 lists the timing parameters for Stratix IV devices for PS configuration.
Table 10–7. PS Timing Parameters for Stratix IV Devices (Part 1 of 2) (Note 1)
Symbol
t_CF2CD
t_CF2ST0
t_CFG
t_STATUS
t_CF2ST1
t_CF2CK
t_ST2CK
t_DSU
t_DH
t_CH
t_CL
t_CLK
f_MAX
t_R
Parameter
nCONFIG low to CONF_DONE low
nCONFIG low to nSTATUS low
nCONFIG low pulse width
nSTATUS low pulse width
nCONFIG high to nSTATUS high
nCONFIG high to first rising edge on DCLK
nSTATUS high to first rising edge of DCLK
Data setup time before rising edge on DCLK
Data hold time after rising edge on DCLK
DCLK high time (5)
DCLK low time (5)
DCLK period (5)
DCLK frequency
Input rise time
Minimum
—
—
2
10
—
500
2
4
0
3.2
3.2
8
—
—
Maximum
800
800
—
500 (2)
500 (3)
—
—
—
—
—
—
—
125
40
Units
ns
ns
s
s
s
s
s
ns
ns
ns
ns
ns
MHz
ns
September 2012 Altera Corporation
Stratix IV Device Handbook
Volume 1