EP4SE360F35I4 Datasheet, PDF (380/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

10–44
Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Device Configuration Pins
Table 10–10. Dedicated Configuration Pins on the Stratix IV Device (Part 3 of 4)
Pin Name
nSTATUS
(continued)
CONF_DONE
nCE
nCEO
ASDO
User Mode
Configuration
Scheme
—
—
N/A
All
N/A
All
N/A
All
N/A
AS
Pin Type
—
Bidirectional
open-drain
Input
Output
Output
Description
If V_CCPGM is not fully powered up, the following could occur:
■ V_CCPGM is powered high enough for the nSTATUS buffer
to function properly and nSTATUS is driven low. When
V_CCPGM is ramped up, POR trips and nSTATUS is released
after POR expires.
■ V_CCPGM is not powered high enough for the nSTATUS
buffer to function properly. In this situation, nSTATUS
might appear logic high, triggering a configuration
attempt that would fail because POR did not yet trip.
When V_CCPD is powered up, nSTATUS is pulled low
because POR did not yet trip. When POR trips after
V_CCPGM is powered up, nSTATUS is released and pulled
high. At that point, reconfiguration is triggered and the
device is configured.
Status output. The target device drives the CONF_DONE pin
low before and during configuration. After all the
configuration data is received without error and the
initialization cycle starts, the target device releases
CONF_DONE.
Status input. After all the data is received and CONF_DONE
goes high, the target device initializes and enters user
mode. The CONF_DONE pin must have an external 10-k
pull-up resistor for the device to initialize.
Driving CONF_DONE low after configuration and initialization
does not affect the configured device.
Active-low chip enable. The nCE pin activates the device
with a low signal to allow configuration. The nCE pin must
be held low during configuration, initialization, and user
mode. In single device configuration, it must be tied low. In
multi-device configuration, nCE of the first device is tied
low, while its nCEO pin is connected to nCE of the next
device in the chain.
The nCE pin must also be held low for successful JTAG
programming of the device.
Output that drives low when device configuration is
complete. In single device configuration, this pin is left
floating. In multi-device configuration, this pin feeds the
next device’s nCE pin. The nCEO of the last device in the
chain is left floating.
The nCEO pin is powered by V_CCPGM.
Control signal from the Stratix IV device to the serial
configuration device in AS mode used to read out
configuration data.
In AS mode, ASDO has an internal pull-up resistor that is
always active.
Stratix IV Device Handbook
Volume 1
September 2012 Altera Corporation