EP4SE360F35I4 Datasheet, PDF (11/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

Chapter Revision Dates
The chapters in this document, Stratix IV Device Handbook, were revised on the
following dates. Where chapters or groups of chapters are available separately, part
numbers are listed.
Chapter 1.
Overview for the Stratix IV Device Family
Revised:
September 2012
Part Number: SIV51001-3.4
Chapter 2.
Logic Array Blocks and Adaptive Logic Modules in Stratix IV Devices
Revised:
February 2011
Part Number: SIV51002-3.1
Chapter 3.
TriMatrix Embedded Memory Blocks in Stratix IV Devices
Revised:
December 2011
Part Number: SIV51003-3.3
Chapter 4.
DSP Blocks in Stratix IV Devices
Revised:
February 2011
Part Number: SIV51004-3.1
Chapter 5.
Clock Networks and PLLs in Stratix IV Devices
Revised:
September 2012
Part Number: SIV51005-3.4
Chapter 6.
I/O Features in Stratix IV Devices
Revised:
September 2012
Part Number: SIV51006-3.4
Chapter 7.
External Memory Interfaces in Stratix IV Devices
Revised:
February 2011
Part Number: SIV51007-3.2
Chapter 8.
High-Speed Differential I/O Interfaces and DPA in Stratix IV Devices
Revised:
September 2012
Part Number: SIV51008-3.4
Chapter 9.
Hot Socketing and Power-On Reset in Stratix IV Devices
Revised:
February 2011
Part Number: SIV51009-3.2
Chapter 10. Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Revised:
September 2012
Part Number: SIV51010-3.5
Chapter 11. SEU Mitigation in Stratix IV Devices
Revised:
February 2011
Part Number: SIV51011-3.2
September 2012 Altera Corporation
Stratix IV Device Handbook
Volume 1