EP4SE360F35I4 Datasheet, PDF (55/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Stratix IV Devices
Adaptive Logic Modules
2–19
LAB Power Management Techniques
The following techniques are used to manage static and dynamic power consumption
within the LAB:
■ To save AC power, the Quartus II software forces all adder inputs low when ALM
adders are not in use.
■ Stratix IV LABs operate in high-performance mode or low-power mode. The
Quartus II software automatically chooses the appropriate mode for the LAB,
based on the design, to optimize speed versus leakage trade-offs.
■ Clocks represent a significant portion of dynamic power consumption due to their
high switching activity and long paths. The LAB clock that distributes a clock
signal to registers within an LAB is a significant contributor to overall clock power
consumption. Each LAB’s clock and clock enable signal are linked. For example, a
combinational ALUT or register in a particular LAB using the labclk1 signal also
uses the labclkena1 signal. To disable LAB-wide clock power consumption
without disabling the entire clock tree, use LAB-wide clock enable to gate the
LAB-wide clock. The Quartus II software automatically promotes register-level
clock enable signals to the LAB-level. All registers within the LAB that share a
common clock and clock enable are controlled by a shared, gated clock. To take
advantage of these clock enables, use a clock-enable construct in your HDL code
for the registered logic.
f For more information about implementing static and dynamic power consumption
within the LAB, refer to the Power Optimization chapter in volume 2 of the Quartus II
Handbook.
Document Revision History
Table 2–1 lists the revision history for this chapter.
Table 2–1. Document Revision History
Date
February 2011
November 2009
June 2009
March 2009
November 2008
May 2008
Version
Changes
■ Updated Figure 2–6.
3.1 ■ Applied new template.
■ Minor text edits.
■ Updated graphics.
3.0
■ Minor text edits.
■ Removed the Conclusion section.
2.2 ■ Added introductory sentences to improve search ability.
■ Minor text edits.
2.1 Removed “Referenced Documents” section.
■ Updated Figure 2–6.
2.0
■ Made minor editorial changes.
1.0 Initial release.
February 2011 Altera Corporation
Stratix IV Device Handbook
Volume 1