EP4SE360F35I4 Datasheet, PDF (21/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

Chapter 1: Overview for the Stratix IV Device Family
1–7
Architecture Features
■ XAUI/HiGig Support
■ Compliant to IEEE802.3ae specification
■ Embedded state machine circuitry to convert XGMII idle code groups (||I||)
to and from idle ordered sets (||A||, ||K||, ||R||) at the transmitter and
receiver, respectively
■ 8B/10B encoder and decoder, receiver synchronization state machine, lane
deskew, and ± 100 ppm clock compensation circuitry
■ GbE Support
■ Compliant to IEEE802.3-2005 specification
■ Automatic idle ordered set (/I1/, /I2/) generation at the transmitter,
depending on the current running disparity
■ 8B/10B encoder and decoder, receiver synchronization state machine, and
± 100 ppm clock compensation circuitry
■ Support for other protocol features such as MSB-to-LSB transmission in
SONET/SDH configuration and spread-spectrum clocking in PCIe configurations
Diagnostic Features
■ Serial loopback from the transmitter serializer to the receiver CDR for transceiver
PCS and PMA diagnostics
■ Reverse serial loopback pre- and post-CDR to transmitter buffer for physical link
diagnostics
■ Loopback master and slave capability in PCI Express hard IP blocks
f For more information, refer to the PCI Express Compiler User Guide.
Signal Integrity
Stratix IV devices simplify the challenge of signal integrity through a number of chip,
package, and board-level enhancements to enable efficient high-speed data transfer
into and out of the device. These enhancements include:
■ Programmable 3-tap transmitter pre-emphasis with up to 8,192 pre-emphasis
levels to compensate for pre-cursor and post-cursor inter-symbol interference (ISI)
■ Up to 900% boost capability on the first pre-emphasis post-tap
■ User-controlled and adaptive 4-stage receiver equalization with up to 16 dB of
high-frequency gain
■ On-die power supply regulators for transmitter and receiver phase-locked loop
(PLL) charge pump and voltage controlled oscillator (VCO) for superior noise
immunity
■ On-package and on-chip power supply decoupling to satisfy transient current
requirements at higher frequencies, thereby reducing the need for on-board
decoupling capacitors
■ Calibration circuitry for transmitter and receiver on-chip termination (OCT)
resistors
September 2012 Altera Corporation
Stratix IV Device Handbook
Volume 1