EP4SE360F35I4 Datasheet, PDF (42/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

2–6
Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Stratix IV Devices
Adaptive Logic Modules
In addition to the adaptive LUT-based resources, each ALM contains two
programmable registers, two dedicated full adders, a carry chain, a shared arithmetic
chain, and a register chain. Through these dedicated resources, an ALM can efficiently
implement various arithmetic functions and shift registers. Each ALM drives all types
of interconnects: local, row, column, carry chain, shared arithmetic chain, register
chain, and direct link. Figure 2–5 shows a high-level block diagram of the Stratix IV
ALM.
Figure 2–5. High-Level Block Diagram of the Stratix IV ALM
shared_arith_in
carry_in
dataf0
datae0
dataa
datab
Combinational/Memory ALUT0
6-Input LUT
adder0
reg_chain_in
labclk
DQ
reg0
To general or
local routing
To general or
local routing
datac
datad
datae1
dataf1
6-Input LUT
adder1
Combinational/Memory ALUT1
shared_arith_out
carry_out
DQ
reg1
reg_chain_out
To general or
local routing
To general or
local routing
Stratix IV Device Handbook
Volume 1
February 2011 Altera Corporation