EP4SE360F35I4 Datasheet, PDF (171/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

Chapter 5: Clock Networks and PLLs in Stratix IV Devices
PLLs in Stratix IV Devices
5–55
Table 5–18. Document Revision History (Part 2 of 2)
Date
April 2009
March 2009
November 2008
May 2008
Version
Changes
■ Updated Table 5–1 and Table 5–7.
2.2 ■ Updated Figure 5–3 and Figure 5–4.
■ Updated the “Periphery Clock Networks” section.
■ Updated Table 5–7.
■ Updated Figure 5–34.
2.1
■ Updated “Guidelines” section.
■ Removed “Referenced Documents” section.
■ Updated Table 5–7.
■ Updated Note 1 of Figure 5–10.
■ Updated Figure 5–15.
2.0
■ Updated Figure 5–20.
■ Added Figure 5–21.
■ Made minor editorial changes.
1.0 Initial release.
September 2012 Altera Corporation
Stratix IV Device Handbook
Volume 1