EP4SE360F35I4 Datasheet, PDF (377/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Device Configuration Pins
10–41
Table 10–9. Stratix IV Configuration Pin Summary (Part 2 of 2) (Note 1)
Description
Input/Output
Dedicated
Powered By
Configuration Mode
DATA0
DATA[7..1]
INIT_DONE
Input
Input
Output
—
V_CCPGM/V_CCIO (3) All modes except JTAG
—
V_CCPGM/V_CCIO (3)
FPP
—
Pull-up
Optional, all modes
CLKUSR
Input
—
V_CCPGM/V_CCIO (3)
Optional
nSTATUS
Bidirectional
Yes
V_CCPGM/Pull-up
All modes
nCE
Input
Yes
V_CCPGM
All modes
CONF_DONE
Bidirectional
Yes
V_CCPGM/Pull-up
All modes
nCONFIG
Input
Yes
V_CCPGM
All modes
PORSEL
Input
Yes
V_CC (2)
All modes
ASDO (4)
Output
Yes
V_CCPGM
AS
nCSO (4)
Output
Yes
V_CCPGM
AS
DCLK (4)
Input
Yes
V_CCPGM
Output
Yes
V_CCPGM
PS, FPP
AS
nIO_PULLUP
Input
Yes
V_CC (2)
All modes
nCEO
Output
Yes
V_CCPGM
All modes
MSEL[2..0]
Input
Yes
V_CC (2)
All modes
Notes to Table 10–9:
(1) The total number of pins is 29. The total number of dedicated pins is 18.
(2) Although MSEL[2..0], PORSEL, and nIO_PULLUP are powered up by V_CC, Altera recommends connecting these pins to V_CCPGM or GND directly
without using a pull-up or pull-down resistor.
(3) These pins are powered up by V_CCPGM during configuration. These pins are powered up by V_CCIO if they are used as regular I/O in user mode.
(4) To tri-state this pin, in the Quartus II software, on the Assignments menu, select Device. On the Device page, select Device and Pin Options...
On the Device and Pin Options page, select Configuration and select the Enable input tri-state on active configuration pins in user mode
option.
September 2012 Altera Corporation
Stratix IV Device Handbook
Volume 1