EP4SE360F35I4 Datasheet, PDF (197/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

Chapter 6: I/O Features in Stratix IV Devices
I/O Structure
6–23
f For more information about the specific sustaining current driven through this
resistor and the overdrive current used to identify the next-driven input level, refer to
the High-Speed Differential I/O Interfaces and DPA in Stratix IV Devices chapter.
Bus-hold circuitry is active only after configuration. When going into user mode, the
bus-hold circuit captures the value on the pin present at the end of configuration.
Programmable Pull-Up Resistor
Each Stratix IV device I/O pin provides an optional programmable pull-up resistor
during user mode. If you enable this feature for an I/O pin, the pull-up resistor
(typically 25 K ) weakly holds the I/O to the V_CCIO level.
Programmable pull-up resistors are only supported on user I/O pins and are not
supported on dedicated configuration pins, JTAG pins, or dedicated clock pins. If you
enable the programmable pull-up option, you cannot use the bus-hold feature.
1 When the optional DEV_OE signal drives low, all the I/O pins remain tri-stated even
with the programmable pull-up option enabled.
Programmable Pre-Emphasis
Stratix IV LVDS transmitters support programmable pre-emphasis to compensate for
the frequency dependent attenuation of the transmission line. The Quartus II software
allows four settings for programmable pre-emphasis.
f For more information about programmable pre-emphasis, refer to the High-Speed
Differential I/O Interfaces and DPA in Stratix IV Devices chapter.
Programmable Differential Output Voltage
Stratix IV LVDS transmitters support programmable V_OD. The programmable V_OD
settings allow you to adjust output eye height to optimize trace length and power
consumption. A higher V_OD swing improves voltage margins at the receiver end; a
smaller V_OD swing reduces power consumption. The Quartus II software allows four
settings for programmable V_OD.
f For more information about programmable V_OD, refer to the High-Speed Differential I/O
Interfaces and DPA in Stratix IV Devices chapter.
MultiVolt I/O Interface
The Stratix IV architecture supports the MultiVolt I/O interface feature that allows the
Stratix IV devices in all packages to interface with systems of different supply
voltages.
You can connect the VCCIO pins to a 1.2-, 1.5-, 1.8-, 2.5-, or 3.0-V power supply,
depending on the output requirements. The output levels are compatible with
systems of the same voltage as the power supply. (For example, when VCCIO pins are
connected to a 1.5-V power supply, the output levels are compatible with 1.5-V
systems.)
September 2012 Altera Corporation
Stratix IV Device Handbook
Volume 1