EP4SE360F35I4 Datasheet, PDF (124/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

5–8
Chapter 5: Clock Networks and PLLs in Stratix IV Devices
Clock Networks in Stratix IV Devices
Figure 5–8. PCLK Networks (EP4SE820 Device)
L1
PCLK[0..15]
CLK[12..15]
T1 T2
R1
PCLK[116..131]
PCLK[16..32]
L2
CLK[0..3]
L3
PCLK[33..49]
Q1 Q2
Q4 Q3
PCLK[99..115]
R2
CLK[8..11]
R3
PCLK[82..98]
PCLK[50..65]
L4
B1 B2
CLK[4..7]
PCLK[66..81]
R4
Stratix IV Device Handbook
Volume 1
September 2012 Altera Corporation