EP4SE360F35I4 Datasheet, PDF (221/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

Chapter 6: I/O Features in Stratix IV Devices
Design Considerations
6–47
Non-Voltage-Referenced Standards
Each I/O bank of a Stratix IV device has its own VCCIO pins and supports only one
V_CCIO, either 1.2, 1.5, 1.8, 2.5, or 3.0 V. An I/O bank can simultaneously support any
number of input signals with different I/O standard assignments if it meets the V_CCIO
and V_CCPD requirement, as shown in Table 6–2 on page 6–3.
For output signals, a single I/O bank supports non-voltage-referenced output signals
that are driving at the same voltage as V_CCIO. Because an I/O bank can only have one
V_CCIO value, it can only drive out that one value for non-voltage-referenced signals.
For example, an I/O bank with a 2.5-V V_CCIO setting can support 2.5-V standard
inputs and outputs as well as 3.0-V LVCMOS inputs (but not output or bidirectional
pins).
Voltage-Referenced Standards
To accommodate voltage-referenced I/O standards, each Stratix IV device’s I/O bank
supports multiple VREF pins feeding a common V_REF bus. The number of available
VREF pins increases as device density increases. If these pins are not used as VREF pins,
they cannot be used as generic I/O pins and must be tied to V_CCIO or GND. Each bank
can only have a single V_CCIO voltage level and a single V_REF voltage level at a given
time.
An I/O bank featuring single-ended or differential standards can support
voltage-referenced standards if all voltage-referenced standards use the same V_REF
setting.
For performance reasons, voltage-referenced input standards use their own V_CCPD
level as the power source. This feature allows you to place voltage-referenced input
signals in an I/O bank with a V_CCIO of 2.5 V or below. For example, you can place
HSTL-15 input pins in an I/O bank with 2.5-V V_CCIO. However, the voltage-referenced
input with parallel OCT enabled requires the V_CCIO of the I/O bank to match the
voltage of the input standard.
Voltage-referenced bidirectional and output signals must be the same as the I/O
bank’s V_CCIO voltage. For example, you can only place SSTL-2 output pins in an I/O
bank with a 2.5-V V_CCIO.
Mixing Voltage-Referenced and Non-Voltage-Referenced Standards
An I/O bank can support both voltage-referenced and non-voltage-referenced pins by
applying each of the rule sets individually. For example, an I/O bank can support
SSTL-18 inputs and 1.8-V inputs and outputs with a 1.8-V V_CCIO and a 0.9-V V_REF.
Similarly, an I/O bank can support 1.5-V standards, 1.8-V inputs (but not outputs),
and HSTL and HSTL-15 I/O standards with a 1.5-V V_CCIO and 0.75-V V_REF.
September 2012 Altera Corporation
Stratix IV Device Handbook
Volume 1