EP4SE360F35I4 Datasheet, PDF (209/432 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Stratix IV device family, which is the most architecturlly advanced

Chapter 6: I/O Features in Stratix IV Devices
OCT Calibration
6–35
For example, Figure 6–23 shows a group of I/O banks that has the same V_CCIO
voltage. If a group of I/O banks has the same V_CCIO voltage, you can use one OCT
calibration block to calibrate the group of I/O banks placed around the periphery.
Because 3B, 4C, 6C, and 7B have the same V_CCIO as bank 7A, you can calibrate all four
I/O banks (3B, 4C, 6C, and 7B) with the OCT calibration block (CB7) located in bank
7A. You can enable this by serially shifting out OCT R_S calibration codes from the
OCT calibration block located in bank 7A to the I/O banks located around the
periphery.
1 I/O banks that do not contain calibration blocks share calibration blocks with I/O
banks that do contain calibration blocks.
Figure 6–23 is a top view of the silicon die that corresponds to a reverse view for flip
chip packages. It is a graphical representation only. This figure does not show
transceiver banks and transceiver calibration blocks.
Figure 6–23. Example of Calibrating Multiple I/O Banks with One Shared OCT Calibration Block
Bank 1A
Bank 1B
Bank 1C
Bank 2C
Bank 2B
Bank 2A
Stratix IV
Bank 6A
Bank 6B
Bank 6C
Bank 5C
Bank 5B
Bank 5A
I/O bank with the same V_CCIO
I/O bank with different V_CCIO
OCT Calibration Block Modes of Operation
Stratix IV devices support OCT R_S and OCT R_T on all I/O banks. The calibration can
occur in either power-up or user mode.
Power-Up Mode
In power-up mode, OCT calibration is automatically performed at power up.
Calibration codes are shifted to selected I/O buffers before transitioning to user
mode.
September 2012 Altera Corporation
Stratix IV Device Handbook
Volume 1