EP2AGX95EF29C6N Datasheet, PDF (95/380 Pages) Altera Corporation – Device Interfaces and Integration

Chapter 4: DSP Blocks in Arria II Devices
Arria II Operational Mode Descriptions
Figure 4–12. Unsigned 54 × 54-Bit Multiplier
clock[3..0]
ena[3..0]
aclr[3..0]
signa
signb
"0"
"0"
dataa[53..36]
datab[53..36]
dataa[35..18]
datab[53..36]
dataa[17..0]
datab[53..36]
dataa[53..36]
datab[35..18]
dataa[53..36]
datab[17..0]
dataa[35..18]
datab[35..18]
dataa[17..0]
datab[35..18]
dataa[35..18]
datab[17..0]
dataa[17..0]
datab[17..0]
Two Multiplier
Adder Mode
+
36
Double Mode
55
108
result[ ]
36 × 36 Mode
72
Unsigned 54 × 54 Multiplier
4–19
December 2010 Altera Corporation
Arria II Device Handbook Volume 1: Device Interfaces and Integration